《二哥学园》是一款极简符号化的Console游戏。玩家操控一个代表“蛋”(二哥)的字符,在由文字符号构成的世界中滚动、跳跃,吸收代表负面情绪的“毒素”(梗),积蓄能量并最终破壳进化。游戏通过纯字幕叙事,内核致敬经典,旨在用最低的开销演绎当代压力图鉴,实现开发与叙事解耦。本仓库为核心程序原型。
最近更新: 13小时前🌳 A series of RISC-V soft core processor written from scratch. Now, we're using all open-source toolchain (chisel, mill, verilator, NEMU, AM and di...
最近更新: 8个月前🌳The next generation integrated development environment for processor design and verification.It has multi-hardware language support, open source I...
最近更新: 8个月前Portable games console, designed from scratch: CPU, graphics, PCB, and the kitchen sink
最近更新: 1年多前Define the Most Advanced AI Camera The open-source, modular design, and programmable system to build your next vision AI project
最近更新: 1年多前Assembler and example programs for the CHUNGUS 2 Minecraft CPU. 这是一个红石CPU的汇编语言工具。CHUNGUS即Computational Humongous Unconventional Number and Graphic...
最近更新: 3年多前Zhou Fan (范舟) This project is a RISC-V CPU with 5-stage pipeline implemented in Verilog HDL, which is a course project of Computer Architecture, A...
最近更新: 4年前This repository contains the Rocket chip generator necessary to instantiate the RISC-V Rocket Core. For more information on Rocket Chip, please con...
最近更新: 4年前We also now have support for block devices, so you can also boot from an ext2 image created by buildroot.
最近更新: 4年多前Verilator 是一个高性能 Verilog HDL 模拟器与 lint 系统,用户编写一个小的 C++/SystemC 封装文件,该文件实例化用户顶层模块的“已验证”模型
最近更新: 4年多前This repo has been put together to demonstrate a number of simple RISC-V integer pipelines written in Chisel: 1-stage (essentially an ISA simulato...
最近更新: 4年多前A simple operating system in Rust. Not in active development. Refer to https://github.com/skyzh/core-os-riscv This project is based on "rust-raspi...
最近更新: 接近5年前