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• 4

wang/uvm-s02 forked from william/uvm-s02

取自张强《UVM实战》第二章的UVM源码

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wang/CNN-FPGA forked from 深蓝梦境/CNN-FPGA

使用Verilog实现的CNN模块，可以方便的在FPGA项目中使用

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wang/CH395Q

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wang/Interface-Protocol-in-Verilog

Interface Protocol in Verilog

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wang/Verilog-SPI-Master

A SPI Master IP written in verilog which is then used to output characters entered on a keypad to a serial LCD screen

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wang/spi_master-1

This repository contains SPI_master verilog code along with its testbench. The spi_master with single, dual and quad bus modes.

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wang/SPI_Master

SPI Master implemented in Verilog HDL

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wang/spi_master_verilog

SPI master in Verilog. CPOL, CPHA implemented.

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wang/Tiny_But_Mighty_I2C_Master_Verilog

SPI master verilog module