diff --git a/1179-target-i386-Add-support-for-CPUID-leaf-0x8000001A.patch b/1179-target-i386-Add-support-for-CPUID-leaf-0x8000001A.patch new file mode 100644 index 0000000000000000000000000000000000000000..534f3ae6ab541d210bfbe8a578f16e0dd2d47cfe --- /dev/null +++ b/1179-target-i386-Add-support-for-CPUID-leaf-0x8000001A.patch @@ -0,0 +1,98 @@ +From 7297e6959ee4e6582b40c209ae75b87d81cc5210 Mon Sep 17 00:00:00 2001 +From: Wei Wang +Date: Thu, 23 Apr 2026 11:33:13 +0800 +Subject: [PATCH 1/3] target/i386: Add support for CPUID leaf 0x8000001A + +CPUID leaf 0x8000001A on Hygon and AMD platforms reports Performance +Optimization Identifiers. These allow the hardware to communicate internal +microarchitectural preferences to the software, such as preferences for +128-bit v.s. 256-bit SSE/AVX instructions or MOVU handling. + +Expose this leaf to the guest to allow the OS and applications to tune +code generation based on these optimization hints. + +Hygon-SIG: commit none hygon target/i386: Add support for CPUID leaf 0x8000001A + +Signed-off-by: Wei Wang +Tested-by: Xiu Lin +Tested-by: Yongwei Xu +--- + target/i386/cpu.c | 21 +++++++++++++++++++++ + target/i386/cpu.h | 8 ++++++++ + 2 files changed, 29 insertions(+) + +diff --git a/target/i386/cpu.c b/target/i386/cpu.c +index fac8135853..7c329808cc 100644 +--- a/target/i386/cpu.c ++++ b/target/i386/cpu.c +@@ -767,6 +767,8 @@ void x86_cpu_vendor_words2str(char *dst, uint32_t vendor1, + + #define TCG_8000_0008_EBX (CPUID_8000_0008_EBX_XSAVEERPTR | \ + CPUID_8000_0008_EBX_WBNOINVD | CPUID_8000_0008_EBX_KERNEL_FEATURES) ++#define TCG_8000_001A_EAX (CPUID_8000_001A_EAX_FP128 | \ ++ CPUID_8000_001A_EAX_MOVU | CPUID_8000_001A_EAX_FP256) + + FeatureWordInfo feature_word_info[FEATURE_WORDS] = { + [FEAT_1_EDX] = { +@@ -1066,6 +1068,22 @@ FeatureWordInfo feature_word_info[FEATURE_WORDS] = { + .tcg_features = TCG_8000_0008_EBX, + .unmigratable_flags = 0, + }, ++ [FEAT_8000_001A_EAX] = { ++ .type = CPUID_FEATURE_WORD, ++ .feat_names = { ++ "fp128", "movu", "fp256", NULL, ++ NULL, NULL, NULL, NULL, ++ NULL, NULL, NULL, NULL, ++ NULL, NULL, NULL, NULL, ++ NULL, NULL, NULL, NULL, ++ NULL, NULL, NULL, NULL, ++ NULL, NULL, NULL, NULL, ++ NULL, NULL, NULL, NULL, ++ }, ++ .cpuid = { .eax = 0x8000001A, .reg = R_EAX, }, ++ .tcg_features = TCG_8000_001A_EAX, ++ .unmigratable_flags = 0, ++ }, + [FEAT_8000_0021_EAX] = { + .type = CPUID_FEATURE_WORD, + .feat_names = { +@@ -7213,6 +7231,9 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count, + *edx = 0; + } + break; ++ case 0x8000001A: ++ *eax = env->features[FEAT_8000_001A_EAX]; ++ break; + case 0x8000001D: + *eax = 0; + if (cpu->cache_info_passthrough) { +diff --git a/target/i386/cpu.h b/target/i386/cpu.h +index 53e51423c8..a08dbae50f 100644 +--- a/target/i386/cpu.h ++++ b/target/i386/cpu.h +@@ -621,6 +621,7 @@ typedef enum FeatureWord { + FEAT_8000_0001_ECX, /* CPUID[8000_0001].ECX */ + FEAT_8000_0007_EDX, /* CPUID[8000_0007].EDX */ + FEAT_8000_0008_EBX, /* CPUID[8000_0008].EBX */ ++ FEAT_8000_001A_EAX, /* CPUID[8000_001A].EAX */ + FEAT_8000_0021_EAX, /* CPUID[8000_0021].EAX */ + FEAT_8C86_0000_EDX, /* CPUID[8C86_0000].EDX */ + FEAT_C000_0001_EDX, /* CPUID[C000_0001].EDX */ +@@ -1030,6 +1031,13 @@ uint64_t x86_cpu_get_supported_feature_word(X86CPU *cpu, FeatureWord w); + /* Predictive Store Forwarding Disable */ + #define CPUID_8000_0008_EBX_AMD_PSFD (1U << 28) + ++/* The internal FP/SIMD execution data path is 128 bits wide */ ++#define CPUID_8000_001A_EAX_FP128 (1U << 0) ++/* MOVU SSE instructions are more efficient than SSE */ ++#define CPUID_8000_001A_EAX_MOVU (1U << 1) ++/* The internal FP/SIMD execution data path is 256 bits wide */ ++#define CPUID_8000_001A_EAX_FP256 (1U << 2) ++ + /* Processor ignores nested data breakpoints */ + #define CPUID_8000_0021_EAX_No_NESTED_DATA_BP (1U << 0) + /* LFENCE is always serializing */ +-- +2.51.0 + diff --git a/1180-target-i386-Expose-CPUID-0x8000001A-values-to-Dha.patch b/1180-target-i386-Expose-CPUID-0x8000001A-values-to-Dha.patch new file mode 100644 index 0000000000000000000000000000000000000000..9b64eac7f59a06ec0fc3ee92ecc5a5aef0163705 --- /dev/null +++ b/1180-target-i386-Expose-CPUID-0x8000001A-values-to-Dha.patch @@ -0,0 +1,45 @@ +From 35c3967799c0691bea02a6559fa80448ca5814bc Mon Sep 17 00:00:00 2001 +From: Wei Wang +Date: Wed, 22 Apr 2026 18:35:11 +0800 +Subject: [PATCH 2/3] target/i386: Expose CPUID 0x8000001A values to + Dharma-v2 and Chengdu-v2 + +CPUID leaf 0x8000001A provides Performance Optimization Identifiers used +by the OS and toolchains to tune code generation for a specific CPU +microarchitecture. These identifiers are already defined for the host +CPUs but were not exposed to Dharma-v2 and Chengdu-v2 guests. + +Populate this leaf for both CPU models so that guests can make use of +the corresponding optimization hints. + +Signed-off-by: Wei Wang +Tested-by: Yongwei Xu +--- + target/i386/cpu.c | 4 ++++ + 1 file changed, 4 insertions(+) + +diff --git a/target/i386/cpu.c b/target/i386/cpu.c +index 7c329808cc..c127179f04 100644 +--- a/target/i386/cpu.c ++++ b/target/i386/cpu.c +@@ -5418,6 +5418,8 @@ static const X86CPUDefinition builtin_x86_defs[] = { + .props = (PropValue[]) { + { "hygon-sm3", "on" }, + { "hygon-sm4", "on" }, ++ { "movu", "on" }, ++ { "fp256", "on" }, + { "model-id", + "Hygon Dharma-v2 processor" }, + { /* end of list */ } +@@ -5495,6 +5497,8 @@ static const X86CPUDefinition builtin_x86_defs[] = { + { "tsc-adjust", "on" }, + { "hygon-sm3", "on" }, + { "hygon-sm4", "on" }, ++ { "movu", "on" }, ++ { "fp256", "on" }, + { "model-id", + "Hygon Chengdu-v2 processor" }, + { /* end of list */ } +-- +2.51.0 + diff --git a/1181-target-i386-Add-xsaves-to-Dharma-v2-and-Chengdu-v.patch b/1181-target-i386-Add-xsaves-to-Dharma-v2-and-Chengdu-v.patch new file mode 100644 index 0000000000000000000000000000000000000000..e6ef21f12db0a2b40969891f97364deb8eba6268 --- /dev/null +++ b/1181-target-i386-Add-xsaves-to-Dharma-v2-and-Chengdu-v.patch @@ -0,0 +1,40 @@ +From 3cff0fbca6664c7ae5daac52b2418c5b7b2fbe69 Mon Sep 17 00:00:00 2001 +From: Wei Wang +Date: Thu, 23 Apr 2026 10:25:26 +0800 +Subject: [PATCH 3/3] target/i386: Add xsaves to Dharma-v2 and Chengdu-v2 + +Physical Hygon Dharma and Chengdu processors support the XSAVES +instruction and the IA32_XSS MSR for compacted supervisor state saving. +Adding xsaves to Dharma-v2 and Chengdu-v2 allows guests on Hygon Gen4 +platforms to utilize optimized supervisor state management without +breaking backwards compatibility. + +Signed-off-by: Wei Wang +Tested-by: Yongwei Xu +--- + target/i386/cpu.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/target/i386/cpu.c b/target/i386/cpu.c +index c127179f04..7dd359fb7e 100644 +--- a/target/i386/cpu.c ++++ b/target/i386/cpu.c +@@ -5420,6 +5420,7 @@ static const X86CPUDefinition builtin_x86_defs[] = { + { "hygon-sm4", "on" }, + { "movu", "on" }, + { "fp256", "on" }, ++ { "xsaves", "on" }, + { "model-id", + "Hygon Dharma-v2 processor" }, + { /* end of list */ } +@@ -5499,6 +5500,7 @@ static const X86CPUDefinition builtin_x86_defs[] = { + { "hygon-sm4", "on" }, + { "movu", "on" }, + { "fp256", "on" }, ++ { "xsaves", "on" }, + { "model-id", + "Hygon Chengdu-v2 processor" }, + { /* end of list */ } +-- +2.51.0 + diff --git a/qemu.spec b/qemu.spec index f6bd5422fcd3501b35a3ca8ca87cd868cb206052..47978249bdada6c00bcb533c01c4885c3b571c90 100644 --- a/qemu.spec +++ b/qemu.spec @@ -136,7 +136,7 @@ Summary: QEMU is a FAST! processor emulator Name: qemu Version: 8.2.2 -Release: 49%{?dist} +Release: 50%{?dist} License: GPLv2 and BSD and MIT and CC-BY URL: http://www.qemu.org/ Source0: https://download.qemu.org/%{name}-%{version}.tar.xz @@ -533,6 +533,11 @@ Patch1177: 1177-target-i386-Add-avx512-vp2intersect-to-Chengdu-v2.patch # CVE-2026-3842 Patch1178: qemu-8.2.2-CVE-2026-3842.patch +#Add more cpuids to Hygon dharma-v2 and chengdu-v2 +Patch1179: 1179-target-i386-Add-support-for-CPUID-leaf-0x8000001A.patch +Patch1180: 1180-target-i386-Expose-CPUID-0x8000001A-values-to-Dha.patch +Patch1181: 1181-target-i386-Add-xsaves-to-Dharma-v2-and-Chengdu-v.patch + BuildRequires: meson >= %{meson_version} BuildRequires: zlib-devel BuildRequires: glib2-devel @@ -2238,6 +2243,10 @@ useradd -r -u 107 -g qemu -G kvm -d / -s /sbin/nologin \ %changelog +* Tue Apr 28 2026 Wei Wang - 8.2.2-50 +- [Type] enhancement +- [DESC] Add more cpuids to Hygon dharma-v2 and chengdu-v2 + * Thu Apr 16 2026 PkgAgent Robot - 8.2.2-49 - [Type] security - [DESC] Fix CVE-2026-3842 vulnerability in Hyper-V Synthetic Debugging device